Hardware development platform · FPGA + AI

ZU-NEXUS-AI

Advanced AI Vision for Embedded Systems

The strategic nexus between multiprocessor FPGA technology and neural acceleration: a flexible, high-performance hardware development platform combining the Zynq UltraScale+ SoC with a dedicated neural accelerator.

ZU-NEXUS-AI starter kit: SOM, carrier board and M.2 NPU module assembled
25 TOPS
Peak INT8 neural
4× A53
Quad core ARM
154K
Logic cells on ZU3EG
< 5 W
NPU module TDP

Three hardware components, one integrated platform

ZU-NEXUS-AI integrates three elements engineered by KED to work together.

01 · Compute module

SOM Zynq UltraScale+

Zynq UltraScale+ SOM in SODIMM form factor
  • ZU1EG / ZU2EG / ZU3EG SoC
  • 4× ARM Cortex-A53 + 2× Cortex-R5 lockstep
  • LPDDR4 32-bit, eMMC + QSPI Flash
  • 4× MGT (PCIe / USB3 / DisplayPort)
  • SODIMM 200-pin form factor, 67.6 × 30 mm

Technical documentation →

02 · Carrier board

ZU-NEXUS-AI Board

ZU-NEXUS-AI carrier board
  • USB-C dual-role (USB 3.0) + USB-C JTAG/console
  • DisplayPort · Gigabit Ethernet · SD Card
  • M.2 Key-M PCIe ×2 for AI accelerators
  • MIPI CSI-2 cameras (22-pin ZIF)
  • Standard SYZYGY expansion · 100 × 100 mm

All the interfaces →

03 · Neural accelerator

DeepX NPU module

DeepX DX-M1 NPU module in M.2 form factor
  • DX-M1 8-core NPU, 25 TOPS INT8
  • PCIe Gen2 ×2 interface
  • DX-M1 in M.2 2280 Key-M
  • DX-M1M in M.2 2242 Key-M
  • TDP < 5 W · ONNX / TFLite / PyTorch SDK

How it works in the pipeline →

The processing pipeline

Optimal workload distribution across FPGA, CPU and neural accelerator.

PL

Sensor

MIPI / Camera Link, radar, ultrasound

PL

Pre-processing

Resize, conversion, DSP filters

PS

DDR buffer

Double / triple buffering

NPU

Inference

INT8 neural networks

PS

Post-processing

Decode, fusion, tracking

Deterministic pre-processing

The FPGA handles acquisition and conversion at fixed, clock-cycle-accurate latency.

Offloaded CPU

Heavy image operations do not burden the ARM cores, which remain free for application logic.

Dedicated NPU

The accelerator runs almost exclusively pure inference, with high and constant throughput.

Multi-sensor fusion

Post-processing fuses camera, radar and other sensors into a single coherent stream.

Board interfaces and specifications

All the SOM high-speed resources exposed on standard connectors.

SoC
Zynq UltraScale+ ZU1EG / ZU2EG / ZU3EG
APU
4× ARM Cortex-A53
RPU
2× ARM Cortex-R5 (lockstep)
RAM
LPDDR4 32-bit
Storage
eMMC + QSPI Flash + SD Card
NPU
DeepX DX-M1 · 25 TOPS INT8
NPU interface
PCIe Gen2 ×2 (M.2 Key-M)
Video out
DisplayPort 1.x — 4K@30 / 1080p@60
Power
5–12 V DC · 8–12 W typical
Dimensions
100 × 100 mm
  • Expansion up to 3 MIPI CSI-2 cameras
  • USB-C dual-role USB 3.0 SuperSpeed
  • USB-C JTAG + dual UART console (FTDI)
  • Gigabit Ethernet (RGMII)
  • M.2 Key-M PCIe ×2 for AI modules
  • SYZYGY and PMOD expansion connectors
  • Compact SWaP-optimized form factor

One platform, five high-value sectors

The same architecture adapts to domains with very different requirements.

Medical

Diagnostic imaging: ultrasound, endoscopy, diagnosis support

Railway

Camera + radar sensor fusion, ATO, infrastructure inspection

Industrial

Quality control, machine vision, real-time robot guidance

Drones / UAV

On-board detection and tracking, ISR, mapping with EO/IR payloads

Space

Vision payloads for satellites and CubeSats, on-board processing

The KED added value

  • Complete Linux Board Support Package for the Zynq UltraScale+ platform
  • Custom embedded distributions: Yocto, Buildroot, Debian
  • Custom operating systems and RTOS configurations for real-time requirements
  • Driver integration, hardware bring-up and boot optimization
  • Custom HDL IP for video acquisition and pre-processing
  • Signal and image processing pipelines in programmable logic
  • AI accelerator integration into the FPGA data-path

Documentation

  • Hardware Architecture Document — Rev. 1.0PDF · coming soon
  • ZU-NEXUS-AI brochurePDF
  • General terms and conditions of salePDF · coming soon
  • Technical wiki: TRM, reference designs, Buildroot, GStreamerWIKI · coming soon

Contact Ked

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